FeFET memory
device, loops and scope in one view
Sweep
Write "1"
Write "0"
Read
Clear traces
Write/sweep A
4.0 V
Read V
R
1.20 V
Device cross-section
Gate V_G = 0.00 V
HZO
σ_b
n+ S
0 V
n+ D
0.0 V
p-Si body
Polarization vs gate voltage
+20
0
−20
−5
0
+5
P (µC/cm²)
V_G (V)
Transfer curve at V_D = 0.1 V
10⁻⁴
10⁻⁸
10⁻¹²
−5
0
+5
log I_D (A)
V_G (V)
Scope: signals vs time
+5 V
−5 V
10⁻⁴
10⁻¹⁴
V_G
log I_D
P / P_r
time →
What is happening
48 domains, median gate-referred V_c 2.2 V (σ 0.4 V). V_t = 1.2 V − 0.9 V·(P/P_r). EKV channel, SS ≈ 80 mV/dec. Switching is instantaneous; no trapping.